Datasheet

1154
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
48.4 USB High Speed Host Port (UHPHS) and Device Port (UDPHS)
48.4.1 UHPHS/UDPHS: Bad Lock of the USB High speed transceiver DLL
The DLL used to oversample the incoming bitstream may not lock in the correct phase, leading to a bad reception of the
incoming packets.
This issue may occur after the USB device resumes from the Suspend mode.
The DLL is used only in the High Speed mode, meaning the Full Speed mode is not impacted by this issue.
This issue may occur on the USB device after a reset leading to a SAM-BA connection issue.
Problem Fix/Workaround:
To prevent a SAM-BA execution issue, the USB device must be connected via a USB Full Speed hub to the PC.
At application level, the DLL can be re-initialized in the correct state by toggling the BIASEN bit (high -> low -> high) when
resuming from the Suspend mode.
The BIASEN bit is located in the CKGR_UCKR register in PMC user interface.
The function below can be used to generate the pulse on the bias signal.
void generate_pulse_bias(void)
{
unsigned int * pckgr_uckr = (unsigned int *) 0xFFFFFC1C;
* pckgr_uckr &= ~AT91_PMC_BIASEN;
* pckgr_uckr |= AT91_PMC_BIASEN;
}
In the USB device driver, the generate_pulse_bias function must be implemented in the “USB end of reset” and “USB
end of resume” interrupts.
48.5 LCD Controller (LCDC)
48.5.1 LCDC: LCDC PWM is not usable
When slow clock is selected as the source clock to feed PWM with (CLKPWMSEL in LCDC_LCDCFG0), the output
waveform generated is corrupted. When the MCK is selected, the prescaler (PWMPS in LCDC_LCDCFG6) is not sized
to generate the PWM output in a range of 200 Hz - 1 kHz.
Problem fix/Workaround
Use standalone PWM output instead of LCDC embedded PWM.