Datasheet

1132
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
The Pen Detection Sensitivity is programmable thanks to an ADC internal resistor. This resistor is set depending on the
value of PENDETSENS bitfield in ADC_ACR register, offset 0x94 in the ADC User Interface.
45.14 Core Power Supply POR Characteristics
45.14.1 Power Sequence Requirements
The AT91 board design must comply with the power-up guidelines below to guarantee reliable operation of the device.
Any deviation from these sequences may prevent the device from booting.
Table 45-27. Transfer Characteristics
Parameter Min Typ Max Units
Resolution 10 bit
Integral Non-linearity ±2LSB
Differential Non-linearity
- ADC Clock = 13.2 MHz
- ADC Clock = 5 MHz
±2
±0.9
LSB
Offset Error ±10 mV
Gain Error
- ADC Clock = 13.2 MHz
- ADC Clock = 5 MHz
±3
±2
LSB
Table 45-28. Pen Detection Sensitivity
ADC_ACR [1:0] Resistor (kOhm)
0200
1150
2 100 (default)
350
Symbol Parameter Conditions Min Typ Max Units
V
th+
Threshold Voltage Rising Minimum Slope of +2.0V/30ms 0.5 0.7 0.89 V
V
th-
Threshold Voltage Falling 0.4 0.6 0.85 V
T
RES
Reset Time 30 70 130 µs
Idd Current consumption After T
RES
37µA