Datasheet

SAM9G15 [DATASHEET]

11052D–ATARM–31-Oct-12

4.2.1 Reset State

In the tables that follow, the column “Reset State” indicates the reset state of the line with mnemonics.

z “PIO” “/” signal

Indicates whether the PIO Line resets in I/O mode or in peripheral mode. If “PIO” is mentioned, the PIO Line is

maintained in a static state as soon as the reset is released. As a result, the bit corresponding to the PIO Line in the

If a signal name is mentioned in the “Reset State” column, the PIO Line is assigned to this function and the

corresponding bit in PIO_PSR resets high. This is the case of pins controlling memories, in particular the address lines,

which require the pin to be driven as soon as the reset is released.

z “I”/”O”

Indicates whether the signal is input or output state.

z “PU”/”PD”

Indicates whether Pull-Up, Pull-Down or nothing is enabled.

z “ST”

Indicates if Schmitt Trigger is enabled.

Note:

Example: The PB18 “Reset State” column shows “PIO, I, PU, ST”. That means the line PIO18 is configured as

an Input with Pull-Up and Schmitt Trigger enabled. PD14 reset state is “PIO, I, PU”. That means PIO Input with

Pull-Up. PD15 reset state is “A20, O, PD” which means output address line 20 with Pull-Down.

USBHS 480 10

HHSDPA, HHSDPB/DHSDP, HHSDMA,

HHSDMB/DHSDM

CLOCK 50 50 XIN, XOUT, XIN32, XOUT32

DIB 25 25 DIBN, DIBP

Table 4-2. SAM9G15 I/O Type Assignment and Frequency (Continued)

I/O Type

I/O Frequency

(MHz)

Charge Load

(pF)

Output

Current

Signal Name