Datasheet

1058
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
44.7.57 High End Overlay Layer Interrupt Mask Register
Name: LCDC_HEOIMR
Address: 0xF8038294
Access: Read-only
Reset: 0x00000000
• DMA: End of DMA Transfer Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• DSCR: Descriptor Loaded Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• ADD: Head Descriptor Loaded Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• DONE: End of List Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• OVR: Overflow Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• UDMA: End of DMA Transfer for U or UV Chrominance Component Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• UDSCR: Descriptor Loaded for U or UV Chrominance Component Interrupt Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
• UADD: Head Descriptor Loaded for U or UV Chrominance Component Mask Register
0: Interrupt source is disabled.
1: Interrupt source is enabled.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
– VOVR VDONE VADD VDSCR VDMA – –
15 14 13 12 11 10 9 8
– UOVR UDONE UADD UDSCR UDMA – –
76543210
– OVR DONE ADD DSCR DMA – –