Datasheet

7
6062LS–ATARM–23-Mar-09
AT91SAM9261
SDRAM Controller
SDCK SDRAM Clock Output
SDCKE SDRAM Clock Enable Output High
SDCS SDRAM Controller Chip Select Output Low
BA0 - BA1 Bank Select Output
SDWE SDRAM Write Enable Output Low
RAS - CAS Row and Column Signal Output Low
SDA10 SDRAM Address 10 Line Output
Multimedia Card Interface
MCCK Multimedia Card Clock Output
MCCDA Multimedia Card A Command I/O
MCDA0 - MCDA3 Multimedia Card A Data I/O
USART
SCK0 - SCK2 Serial Clock I/O
TXD0 - TXD2 Transmit Data Output
RXD0 - RXD2 Receive Data Input
RTS0 - RTS2 Request To Send Output
CTS0 - CTS2 Clear To Send Input
Synchronous Serial Controller
TD0 - TD2 Transmit Data Output
RD0 - RD2 Receive Data Input
TK0 - TK2 Transmit Clock I/O
RK0 - RK2 Receive Clock I/O
TF0 - TF2 Transmit Frame Sync I/O
RF0 - RF2 Receive Frame Sync I/O
Timer/Counter
TCLK0 - TCLK2 External Clock Input Input
TIOA0 - TIOA2 I/O Line A I/O
TIOB0 - TIOB2 I/O Line B I/O
SPI
SPI0_MISO -
SPI1_MISO
Master In Slave Out I/O
SPI0_MOSI -
SPI1_MOSI
Master Out Slave In I/O
SPI0_SPCK -
SPI1_SPCK
SPI Serial Clock I/O
SPI0_NPCS0,
SPI1_NPCS0
SPI Peripheral Chip Select 0 I/O Low
SPI0_NPCS1 -
SPI0_NPCS3
SPI1_NPCS1 -
SPI1_NPCS3
SPI Peripheral Chip Select Output Low
Table 3-1. Signal Description by Peripheral (Continued)
Signal Name Function Type Active Level Comments