Datasheet

41
6062LS–ATARM–23-Mar-09
AT91SAM9261
13. Revision History
Table 13-1. Revision History
Doc.
Rev. Source Comments
6062AS Qualified/Internal: 23-Aug-04
6062BS
Date: 02-Jun-05
CSR 04-370
Change to Additional Embedded Memories in “Features” on page 1. Change to Section 5.2 “Power
Consumption” on page 11. Change to Table 8-3 on page 18.
CSR 04-371
Change to AIC, “Features” on page 1, SMCS signal added to Table 3-1, “Signal Description by
Peripheral,” on page 5, Change to Section 10.3.1.5 “NAND Flash Interface” on page 30.
CSR 04-376
Added NTRST signal to“Block Diagram” on page 4. NTRST signal added to Table 3-1 on page 5. F1
modified in Table 4-1 on page 10. Change to “JTAG Port Pins” on page 11.
CSR 04-446
Changed ROM access to single cycle in “Features” on page 1 and Section 8.1 “Embedded Memories”
on page 17.
CSR 04-447
Replaced “PDMA” with “PDC” throughout. Replaced “Peripheral DMA” with “Peripheral DMA Controller”
throughout.
CSR 04-461 New pinout for 217-ball LFBGA package, Table 2 updated.
CSR 04-475
Updated Section 8.1.2 ”Boot Program” on page 20.
Removed “Embedded Software Services” on page 18.
CSR 05-023
Changed min voltage level for VDDIOM and VDDIOP to 2.7V throughout. Corrected nominal voltage
level for VDDIOP and VDDIOP in Section 5.1 “Power Supplies” on page 11.
CSR 05-024
Added information on chip select assignment management in Section 10.4 “External Bus Interface” on
page 34.
Added information on configuration management of embedded pad pull-up in Section 10.13 “USB” on
page 38.
Throughout document: All references to SmartMedia removed and replaced by NAND Flash. All signals
SMxx changed to NANDxx.
Throughout document: Package now qualified as RoHS-compliant
Changed pull-up resistor level to 10 kOhm in Section 6.4 “PIO Controller A, B and C Lines” on page 12.
Changed typical conditions for VDDCORE to 1.2V in Section 5.2 “Power Consumption” on page 11.
Corrected BMS state in Table 8-3, “Internal Memory Mapping,” on page 18.
Corrected BMS reset condition for ROM access in Section 8.1.1.2 “Internal ROM” on page 19.
6062CS
Date: 15-Nov-05
CSR 05-398
Changed SPI pin names in Figure 2-1, “AT91SAM9261 Block Diagram,” on page 4, Table 3-1, “Signal
Description by Peripheral,” on page 5, Table 10-2, “Multiplexing on PIO Controller A,” on page 31,
Table 10-3, “Multiplexing on PIO Controller B,” on page 32
and Table 10-4, “Multiplexing on PIO
Controller C,” on page 33.
CSR 05-481 Updated A22 pin in Figure 2-1, “AT91SAM9261 Block Diagram,” on page 4.
CSR 05-496
Changed value of programmable pull-up resistor in Section 6.4 “PIO Controller A, B and C Lines” on
page 12.
CSR 05-487 Updated Table 12-1, “AT91SAM9261 Ordering Information,” on page 40.