Datasheet

25
6062LS–ATARM–23-Mar-09
AT91SAM9261
9.6 Power Management Controller
• The Power Management Controller provides:
– the Processor Clock PCK
– the Master Clock MCK
– the USB Clock USBCK (HCK0)
– the LCD Controller Clock LCDCK (HCK1)
– up to thirty peripheral clocks
– four programmable clock outputs: PCK0 to PCK3
Figure 9-3. Power Management Controller Block Diagram
9.7 Periodic Interval Timer
• Includes a 20-bit Periodic Counter with less than 1 µs accuracy
• Includes a 12-bit Interval Overlay Counter
• Real time OS or Linux
®
/WindowsCE
®
compliant tick generator
9.8 Watchdog Timer
• 12-bit key-protected only-once programmable counter
• Windowed, prevents the processor to be in a dead-lock on the watchdog access
9.9 Real-time Timer
• 32-bit Free-running backup counter
• Alarm Register capable to generate a wake-up of the system
MCK
periph_clk[2..21]
int
UDPCK
usb_suspend
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
PCK
Processor
Clock
Controller
Idle Mode
Master Clock Controller
APB Peripherals
Clock Controller
ON/OFF
USB Clock Controller
ON/OFF
SLCK
MAINCK
PLLACK
Prescaler
/1,/2,/4,...,/64
Programmable Clock Controller
PLLBCK
Divider
/1,/2,/4
pck[0..3]
PLLBCK
PLLBCK
UHPCK
Divider
/1,/2,/4
HCKx
AHB Peripherals
Clock Controller
ON/OFF