Datasheet

14
SAM9260 [SUMMARY]
6221LS–ATARM–15-Oct-12
6.7 Slow Clock Selection
The SAM9260 slow clock can be generated either by an external 32,768 Hz crystal or the on-chip RC oscillator.
Table 6-1 defines the states for OSCSEL signal.
The startup counter delay for the slow clock oscillator depends on the OSCSEL signal. The 32,768 Hz startup delay is
1200 ms whereas it is 240 µs for the internal RC oscillator (refer to Table 6-1). The pin OSCSEL must be tied either to
GND or VDDBU for correct operation of the device.
Table 6-1. Slow Clock Selection
OSCSEL Slow Clock Startup Time
0 Internal RC 240 µs
1 External 32768 Hz 1200 ms