Datasheet

608
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
41.2 Errata Summary by Product and Revision or Manufacturing Number
Table 41-1. Errata Summary Table
SAM7Xx Product
Revision or Manufacturing Number
Errata
SAM7X512 rev A SAM7X512 rev B SAM7X256/128 rev A SAM7X256/128 rev B SAM7X256/128 rev C
Part
Boundary
Scan
BSDL File for Rev. B Devices Not Compatible with Rev. C
Devices
––––X
ADC DRDY Bit Cleared
XXXX–
ADC DRDY not Cleared on Disable
XXXX–
ADC DRDY Possibly Skipped due to CDR Read
XXXX–
ADC Possible Skip on DRDY when Disabling a Channel
XXXX–
ADC GOVRE Bit is not Updated
XXXX–
ADC GOVRE Bit is not Set when Reading CDR
XXXX–
ADC GOVRE Bit is not Set when Disabling a Channel
XXXX–
ADC OVRE Flag Behavior
XXXX–
ADC EOC Set although Channel Disabled
XXXX–
ADC Spurious Clear of EOC Flag
XXXX–
ADC Sleep Mode
XXXX–
CAN Low Power Mode and Error Frame
XXXX–
CAN Low Power Mode and Pending Transmit Messages
XXXX–
EFC1 Embedded Flash Access Time 1
X––––
EFC2 Embedded Flash Access Time 2
–X––X
EMAC RMII Mode
––XX–
EMAC Possible Event Loss when Reading EMAC_ISR
XXXXX
EMAC Possible Event Loss when Reading the Statistics Register Block
XXXXX
PIO Leakage on PB27 - PB30
XXX––
PIO
Electrical Characteristics on NRST and PA0-PA30 and PB0 -
PB26
XXXXX
PIO Drive Low NRST, PA0-PA30 and PB0-PB26
XXXXX
PWM Update when PWM_CCNTx = 0 or 1
XXXXX
PWM Update when PWM_CPRDx = 0
XXXXX
PWM Counter Start Value
XXXXX
PWM Behavior of CHIDx Status Bits in the PWM_SR Register
XXXX–
RTT Possible Event Loss when Reading RTT_SR
XXXXX
SPI Software Reset Must be Written Twice
XX–X–
SPI Bad Behavior when CSAAT = 1 and SCBR = 1
XXXX–