Datasheet

428
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
33.6.13 PWM Channel Update Register
Register Name: PWM_CUPD[0..X-1]
Access Type: Write-only
This register acts as a double buffer for the period or the duty cycle. This prevents an unexpected waveform when modifying the
waveform period or duty-cycle.
Only the first 16 bits (internal channel counter size) are significant.
31 30 29 28 27 26 25 24
CUPD
23 22 21 20 19 18 17 16
CUPD
15 14 13 12 11 10 9 8
CUPD
76543210
CUPD
CPD (PWM_CMRx Register)
0
The duty-cycle (CDTY in the PWM_CDTYx register) is updated with the CUPD value at the
beginning of the next period.
1
The period (CPRD in the PWM_CPRDx register) is updated with the CUPD value at the beginning
of the next period.