Datasheet

42
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
11.2.6 Thumb Instruction Set Overview
The Thumb instruction set is a re-encoded subset of the ARM instruction set.
The Thumb instruction set is divided into:
 Branch instructions
 Data processing instructions
 Load and Store instructions
 Load and Store Multiple instructions
 Exception-generating instruction
In Thumb mode, eight general-purpose registers, R0 to R7, are available that are the same physical registers as R0 to
R7 when executing ARM instructions. Some Thumb instructions also access to the Program Counter (ARM Register 15),
the Link Register (ARM Register 14) and the Stack Pointer (ARM Register 13). Further instructions allow limited access
to the ARM registers 8 to 15.
Table 11-3 gives the Thumb instruction mnemonic list.
LDR Load Word SWI Software Interrupt
LDRSH Load Signed Halfword STR Store Word
LDRSB Load Signed Byte STRH Store Half Word
LDRH Load Half Word STRB Store Byte
LDRB Load Byte STRBT Store Register Byte with Translation
LDRBT Load Register Byte with Translation STRT Store Register with Translation
LDRT Load Register with Translation STM Store Multiple
LDM Load Multiple SWPB Swap Byte
SWP Swap Word MRC Move From Coprocessor
MCR Move To Coprocessor STC Store From Coprocessor
LDC Load To Coprocessor
Table 11-2. ARM Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
Table 11-3. Thumb Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
MOV Move MVN Move Not
ADD Add ADC Add with Carry
SUB Subtract SBC Subtract with Carry
CMP Compare CMN Compare Negated
TST Test NEG Negate
AND Logical AND BIC Bit Clear
EOR Logical Exclusive OR ORR Logical (inclusive) OR
LSL Logical Shift Left LSR Logical Shift Right
ASR Arithmetic Shift Right ROR Rotate Right
MUL Multiply
B Branch BL Branch and Link
BX Branch and Exchange SWI Software Interrupt