Datasheet

41
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
11.2.4.3 Exception Types
The ARM7TDMI supports five types of exception and a privileged processing mode for each type. The types of exceptions
are:
 fast interrupt (FIQ)
 normal interrupt (IRQ)
 memory aborts (used to implement memory protection or virtual memory)
 attempted execution of an undefined instruction
 software interrupts (SWIs)
Exceptions are generated by internal and external sources.
More than one exception can occur in the same time.
When an exception occurs, the banked version of R14 and the SPSR for the exception mode are used to save state.
To return after handling the exception, the SPSR is moved to the CPSR, and R14 is moved to the PC. This can be done
in two ways:
 by using a data-processing instruction with the S-bit set, and the PC as the destination
 by using the Load Multiple with Restore CPSR instruction (LDM)
11.2.5 ARM Instruction Set Overview
The ARM instruction set is divided into:
 Branch instructions
 Data processing instructions
 Status register transfer instructions
 Load and Store instructions
 Coprocessor instructions
 Exception-generating instructions
ARM instructions can be executed conditionally. Every instruction contains a 4-bit condition code field (bit[31:28]).
Table 11-2 gives the ARM instruction mnemonic list.
Table 11-2. ARM Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
MOV Move CDP Coprocessor Data Processing
ADD Add MVN Move Not
SUB Subtract ADC Add with Carry
RSB Reverse Subtract SBC Subtract with Carry
CMP Compare RSC Reverse Subtract with Carry
TST Test CMN Compare Negated
AND Logical AND TEQ Test Equivalence
EOR Logical Exclusive OR BIC Bit Clear
MUL Multiply ORR Logical (inclusive) OR
SMULL Sign Long Multiply MLA Multiply Accumulate
SMLAL Signed Long Multiply Accumulate UMULL Unsigned Long Multiply
MSR Move to Status Register UMLAL Unsigned Long Multiply Accumulate
B Branch MRS Move From Status Register
BX Branch and Exchange BL Branch and Link