Datasheet

314
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
30.6.5.3 IrDA Demodulator
The demodulator is based on the IrDA Receive filter comprised of an 8-bit down counter which is loaded with the value
programmed in US_IF. When a falling edge is detected on the RXD pin, the Filter Counter starts counting down at the
Master Clock (MCK) speed. If a rising edge is detected on the RXD pin, the counter stops and is reloaded with US_IF. If
no rising edge is detected when the counter reaches 0, the input of the receiver is driven low during one bit time.
Figure 30-25 illustrates the operations of the IrDA demodulator.
Figure 30-25. IrDA Demodulator Operations
As the IrDA mode uses the same logic as the ISO7816, note that the FI_DI_RATIO field in US_FIDI must be set to a
value higher than 0 in order to assure IrDA communications operate correctly.
MCK
RXD
Receiver
Input
Pulse
Rejected
65432 6
1
65432 0
Pulse
Accepted
Counter
Value