Datasheet
276
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
29.5.6 Read/Write Flowcharts
The following flowcharts shown in Figure 29-13, Figure 29-14 on page 277, Figure 29-15 on page 278, Figure 29-16 on
page 279, Figure 29-17 on page 280 and Figure 29-18 on page 281 give examples for read and write operations. A
polling or interrupt method can be used to check the status bits. The interrupt method requires that the interrupt enable
register (TWI_IER) be configured first.
Figure 29-13. TWI Write Operation with Single Data Byte without Internal Address
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)
Set the Control register:
- Master enable
TWI_CR = MSEN
Set the Master Mode register:
- Device slave address (DADR)
- Transfer direction bit
Write ==> bit MREAD = 0
Load Transmit register
TWI_THR = Data to send
Read Status register
TXRDY = 1?
Read Status register
TXCOMP = 1?
Transfer finished
Ye s
Ye s
BEGIN
No
No