Datasheet

269
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
29. Two-wire Interface (TWI)
29.1 Overview
The Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of one clock line and one
data line with speeds of up to 400 Kbits per second, based on a byte-oriented transfer format. It can be used with any
Atmel Two-wire Interface bus Serial EEPROM and I²C compatible device such as Real Time Clock (RTC), Dot
Matrix/Graphic LCD Controllers and Temperature Sensor, to name but a few. The TWI is programmable as master
transmitter or master receiver with sequential or single-byte access. A configurable baud rate generator permits the
output data rate to be adapted to a wide range of core clock frequencies. Below,
Table 29-1 lists the compatibility level of
the Atmel Two-wire Interface and a full I2C compatible device.
Notes: 1. START + b000000001 + Ack + Sr
2. A repeated start condition is only supported in Master Receiver mode. See Section 29.5.5 “Internal
Address” on page 274
29.2 Block Diagram
Figure 29-1. Block Diagram
Table 29-1. Atmel TWI compatibility with i2C Standard
I2C Standard Atmel TWI
Standard Mode Speed (100 KHz) Supported
Fast Mode Speed (400 KHz) Supported
7 or 10 bits Slave Addressing Supported
START BYTE
(1)
Not Supported
Repeated Start (Sr) Condition Not Fully Supported
(2)
ACK and NACK Management Supported
Slope control and input filtering (Fast mode) Not Supported
Clock strectching Supported
APB Bridge
PMC
MCK
Two-wire
Interface
PIO
AIC
TWI
Interrupt
TWCK
TWD