Datasheet

221
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
27.4 Functional Description
The PIO Controller features up to 32 fully-programmable I/O lines. Most of the control logic associated to each I/O is
represented in Figure 27-3. In this description each signal shown represents but one of up to 32 possible indexes.
Figure 27-3. I/O Line Control Logic
27.4.1 Pull-up Resistor Control
Each I/O line is designed with an embedded pull-up resistor. The pull-up resistor can be enabled or disabled by writing
respectively PIO_PUER (Pull-up Enable Register) and PIO_PUDR (Pull-up Disable Resistor). Writing in these registers
1
0
1
0
1
0
Glitch
Filter
Peripheral B
Input
Peripheral A
Input
1
0
PIO_IFDR[0]
PIO_IFSR[0]
PIO_IFER[0]
Edge
Detector
PIO_PDSR[0] PIO_ISR[0]
PIO_IDR[0]
PIO_IMR[0]
PIO_IER[0]
PIO Interrupt
(Up to 32 possible inputs)
PIO_ISR[31]
PIO_IDR[31]
PIO_IMR[31]
PIO_IER[31]
Pad
1
0
PIO_PUDR[0]
PIO_PUSR[0]
PIO_PUER[0]
PIO_MDDR[0]
PIO_MDSR[0]
PIO_MDER[0]
PIO_CODR[0]
PIO_ODSR[0]
PIO_SODR[0]
PIO_PDR[0]
PIO_PSR[0]
PIO_PER[0]
1
0
1
0
PIO_BSR[0]
PIO_ABSR[0]
PIO_ASR[0]
Peripheral B
Output Enable
Peripheral A
Output Enable
Peripheral B
Output
Peripheral A
Output
PIO_ODR[0]
PIO_OSR[0]
PIO_OER[0]