Datasheet

219
SAM7X Series [DATASHEET]
6120K–ATARM–11-Feb-14
27. Parallel Input/Output Controller (PIO)
27.1 Overview
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output lines. Each I/O line may be
dedicated as a general-purpose I/O or be assigned to a function of an embedded peripheral. This assures effective
optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User Interface.
Each I/O line of the PIO Controller features:
 An input change interrupt enabling level change detection on any I/O line.
 A glitch filter providing rejection of pulses lower than one-half of clock cycle.
 Multi-drive capability similar to an open drain I/O line.
 Control of the the pull-up of the I/O line.
 Input visibility and output control.
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a single write operation.
27.2 Block Diagram
Figure 27-1. Block Diagram
Embedded
Peripheral
Embedded
Peripheral
PIO Interrupt
PIO Controller
Up to 32 pins
PMC
Up to 32
peripheral IOs
Up to 32
peripheral IOs
PIO Clock
APB
AIC
Data, Enable
PIN 31
PIN 1
PIN 0
Data, Enable