User manual

Board Description
3-2 AT91SAM7X-EK Evaluation Board User Guide
6195E–ATARM–22-Mar-07
Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz)
and Idle Mode
Four Programmable External Clock Signals
! Advanced Interrupt Controller (AIC)
Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
Two External Interrupt Sources and One Fast Interrupt Source, Spurious
Interrupt Protected
! Debug Unit (DBGU)
2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
! Periodic Interval Timer (PIT)
20-bit Programmable Counter plus 12-bit Interval Counter
! Windowed Watchdog (WDT)
12-bit key-protected Programmable Counter
Provides Reset or Interrupt Signals to the System
Counter May Be Stopped While the Processor is in Debug State or in Idle
Mode
! Real-time Timer (RTT)
32-bit Free-running Counter with Alarm
Runs Off the Internal RC Oscillator
! Two Parallel Input/Output Controllers (PIO)
Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
Input Change Interrupt Capability on Each I/O Line
Individually Programmable Open-drain, Pull-up Resistor and Synchronous
Output
! Thirteen Peripheral DMA Controller (PDC) Channels
! One USB 2.0 Full Speed (12 Mbits per second) Device Port
On-chip Transceiver, 1352-byte Configurable Integrated FIFOs
! One Ethernet MAC 10/100 base-T
Media Independent Interface (MII) or Reduced Media Independent Interface
(RMII)
Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and
Receive
! One Part 2.0A and Part 2.0B Compliant CAN Controller
Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp
Counter
! One Synchronous Serial Controller (SSC)
Independent Clock and Frame Sync Signals for Each Receiver and
Transmitter
I²S Analog Interface Support, Time Division Multiplex Support
High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer