Datasheet

18
6222GS–ATARM–6-Sep-11
SAM7SE512/256/32 Summary
– Individually programmable size between 1K Byte and 1M Byte
– Individually programmable protection against write and/or user access
– Peripheral protection against write and/or user access
• Embedded Flash Controller
– Embedded Flash interface, up to three programmable wait states
– Prefetch buffer, buffering and anticipating the 16-bit requests, reducing the required
wait states
– Key-protected program, erase and lock/unlock sequencer
– Single command for erasing, programming and locking operations
– Interrupt generation in case of forbidden operation
7.4 External Bus Interface
• Integrates Three External Memory Controllers:
– Static Memory Controller
– SDRAM Controller
– ECC Controller
• Additional Logic for NAND Flash and CompactFlash
®
Support
– NAND Flash support: 8-bit as well as 16-bit devices are supported
– CompactFlash support: all modes (Attribute Memory, Common Memory, I/O, True
IDE) are supported but the signals _IOIS16 (I/O and True IDE modes) and -ATA SEL
(True IDE mode) are not handled.
• Optimized External Bus:
– 16- or 32-bit Data Bus (32-bit Data Bus for SDRAM only)
– Up to 23-bit Address Bus, Up to 8-Mbytes Addressable
– Up to 8 Chip Selects, each reserved to one of the eight Memory Areas
– Optimized pin multiplexing to reduce latencies on External Memories
• Configurable Chip Select Assignment:
– Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS2, Optional CompactFlash Support
– Static Memory Controller on NCS3, NCS5 - NCS6, Optional NAND Flash Support
– Static Memory Controller on NCS4, Optional CompactFlash Support
– Static Memory Controller on NCS7
7.5 Static Memory Controller
• External memory mapping, 512-Mbyte address space
• 8-, or 16-bit Data Bus
• Up to 8 Chip Select Lines
• Multiple Access Modes supported
– Byte Write or Byte Select Lines
– Two different Read Protocols for each Memory Bank