Datasheet
48
SAM7S Series [DATASHEET]
6175KS–ATARM–25-Oct-12
Revision History
Doc. Rev Comments
Change
Request
Ref.
6175AS
First issue - Unqualified on Intranet
Corresponds to 6175A full datasheet approval loop.
Qualified on Intranet.
6175BS Section 8. “Memories” on page 18 updated: 2 ms => 3 ms, 10 ms => 15 ms, 4 ms => 6 ms CSR05-529
6175CS Section 12. ”SAM7S Ordering Information” AT91SAM7S321 changed in Table 12-1 on page 47 #2342
6175DS
“Features” , Table 1-1, “Configuration Summary,” on page 3, Section 4. ”Package and Pinout”
Section 12. ”SAM7S Ordering Information” QFN package information added
#2444
6175ES Section 10.11 on page 39 USB Device port, Ping-pong Mode includes Isochronous endpoints. specs
“Features” on page 1, and global: AT91SAM7S512 added to series. Reference to Manchester Encoder
removed from USART.
Section 8. ”Memories” Reformatted Memories, Consolidated Memory Mapping in Figure 8-1 on page 20
Section 10. ”Peripherals” Reordered sub sections.
Section 11. ”Package Drawings” QFN, LQFP package drawings added.
#2748
“ice_nreset” signals changed to” power_on_reset” in System Controller block diagrams, Figure 9-1 on
page 26 and Figure 9-2 on page 27.
#2832
(DBGU IP)
Section 4. ”Package and Pinout” LQFP and QFN Package Outlines replace Mechanical Overview.
Section 10.1 ”User Interface”, User peripherals are mapped between 0xF000 0000 and 0xFFFF EFFF.
SYSIRQ changed to SYSC in “Peripheral Identifiers” Table 10-1 and Table 10-2
rfo review
6175FS AT91SAM7S161 and AT91SAM7S16 added to product family BDs
Features: Timer Counter, on page 2 product specific information rewritten, Table 1-1, “Configuration
Summary,” on page 3, footnote explains TC on AT91SAM7S32/16 has only two channels accessible via
PIO, and in Section 10.9 ”Timer Counter”, precisions added to “compare and capture” output/input.
4208
Section 10.6 ”Two-wire Interface”, updated reference to I
2
C compatibility, internal address registers,
slave addressing, Modes for AT91SAM7S161/16
“One Two-wire Interface (TWI)” on page 2, updated in Features
Section 10.12 ”Analog-to-digital Converter”, updated Successive Approximation Register ADC and the
INL, DNL ± values of LSB.
Section 8.8.3 ”Lock Regions”, locked-region’s erase or program command updated
Section 9.5 ”Debug Unit”, Chip ID updated.
rfo review
4325
Section 6. ”I/O Lines Considerations”, JTAG Port Pin, Test Pin, Erase Pin, updated. 5063