Datasheet

584
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
37.10.4.2 JTAG Interface Signals
.
Note: 1. V
VDDIO
from 3.0V to 3.6V, maximum external capacitor = 40pF
Figure 37-18. JTAG Interface Signals
Table 37-27. JTAG Interface Timing Specification
Symbol Parameter Conditions Min Max Units
JTAG
0
TCK Low Half-period
(1)
6.5 ns
JTAG
1
TCK High Half-period
(1)
5.5 ns
JTAG
2
TCK Period
(1)
12 ns
JTAG
3
TDI, TMS Setup before TCK High
(1)
2ns
JTAG
4
TDI, TMS Hold after TCK High
(1)
3ns
JTAG
5
TDO Hold Time
(1)
4ns
JTAG
6
TCK Low to TDO Valid
(1)
16 ns
JTAG
7
Device Inputs Setup Time
(1)
0ns
JTAG
8
Device Inputs Hold Time
(1)
3ns
JTAG
9
Device Outputs Hold Time
(1)
6ns
JTAG
10
TCK to Device Outputs Valid
(1)
18 ns
TCK
JTAG
9
TMS/TDI
TDO
Device
Outputs
JTAG
5
JTAG
4
JTAG
3
JTAG
0
JTAG
1
JTAG
2
JTAG
10
Device
Inputs
JTAG
8
JTAG
7
JTAG
6