Manualshelf

Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 48 (7x7) 16/32-Bit 55 MHz I/O number 21
321322323324325326327328329330
Table Of Contents
326
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
Figure 30-11. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 30-12. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
30.7.6.2 10-bit Slave Addressing
For a slave address higher than 7 bits, the user must configure the address size (IADRSZ) and set the other slave
address bits in the internal address register (TWI_IADR). The two remaining Internal address bytes, IADR[15:8]
and IADR[23:16] can be used the same as in 7-bit Slave Addressing.
Example:
Address a 10-bit device (10-bit device address is b1 b2 b3 b4 b5 b6 b7 b8 b9 b10)
1. Program IADRSZ = 1,
2. Program DADR with 1 1 1 1 0 b1 b2 (b1 is the MSB of the 10-bit address, b2, etc.)
3. Program TWI_IADR with b3 b4 b5 b6 b7 b8 b9 b10 (b10 is the LSB of the 10-bit address)
4.
Figure 30-13 below shows a byte write to an Atmel AT24LC512 EEPROM. This demonstrates the use of internal
addresses to access the device.
Figure 30-13. Internal Address Usage
•N
Not Acknowledge
•DADR
Device Address
•IADR
Internal Address
S DADR W A IADR(23:16) A IADR(15:8) A IADR(7:0) A DATA A P
S DADR W A IADR(15:8) A IADR(7:0) A P
DATA A
A IADR(7:0) A P
DATA AS DADR W
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
TWD
TWD
S DADR
W
A IADR(23:16) A
IADR(15:8)
A
IADR(7:0) A
S DADR W A IADR(15:8)
A IADR(7:0) A
A
IADR(7:0) A
S DADR W
DATA N P
Sr DADR R A
Sr DADR R A DATA N P
Sr
DADR
RA DATA NP
TWD
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
S
T
A
R
T
M
S
B
Device
Address
0
L
S
B
R
/
W
A
C
K
M
S
B
W
R
I
T
E
A
C
K
A
C
K
L
S
B
A
C
K
FIRST
WORD ADDRESS
SECOND
WORD ADDRESS DATA
S
T
O
P