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ManualsBrandsMICROCHIP TECHNOLOGY ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 48 (7x7) 16/32-Bit 55 MHz I/O number 21
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SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
Figure 35-10. Bank Swapping in Data OUT Transfers for Ping-pong Endpoints
When using a ping-pong endpoint, the following procedures are required to perform Data OUT transactions:
1. The host generates a Data OUT packet.
2. This packet is received by the USB device endpoint. It is written in the endpoint’s FIFO Bank 0.
3. The USB device sends an ACK PID packet to the host. The host can immediately send a second Data
OUT packet. It is accepted by the device and copied to FIFO Bank 1.
4. The microcontroller is notified that the USB device has received a data payload, polling RX_DATA_BK0 in
the endpoint’s UDP_ CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK0 is set.
5. The number of bytes available in the FIFO is made available by reading RXBYTECNT in the endpoint’s
UDP_ CSRx register.
6. The microcontroller transfers out data received from the endpoint’s memory to the microcontroller’s mem-
ory. Data received is made available by reading the endpoint’s UDP_ FDRx register.
7. The microcontroller notifies the USB peripheral device that it has finished the transfer by clearing
RX_DATA_BK0 in the endpoint’s UDP_ CSRx register.
8. A third Data OUT packet can be accepted by the USB peripheral device and copied in the FIFO Bank 0.
9. If a second Data OUT packet has been received, the microcontroller is notified by the flag RX_DATA_BK1
set in the endpoint’s UDP_ CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK1 is
set.
10. The microcontroller transfers out data received from the endpoint’s memory to the microcontroller’s mem-
ory. Data received is available by reading the endpoint’s UDP_ FDRx register.
11. The microcontroller notifies the USB device it has finished the transfer by clearing RX_DATA_BK1 in the
endpoint’s UDP_ CSRx register.
12. A fourth Data OUT packet can be accepted by the USB device and copied in the FIFO Bank 0.
USB Device USB Bus
Read
Write
Write and Read at the Same Time
1
st
Data Payload
2
nd
Data Payload
3
rd
Data Payload
3
rd
Data Payload
2
nd
Data Payload
1
st
Data Payload
Data IN Packet
Data IN Packet
Data IN Packet
Microcontroller
Endpoint 1
Bank 0
Endpoint 1
Bank 1
Endpoint 1
Bank 0
Endpoint 1
Bank 0
Endpoint 1
Bank 0
Endpoint 1
Bank 1