Datasheet
637
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
PIO:Section 27.5.4 ”Output Control” on page 231, typo corrected
Section 27.5.1 ”Pull-up Resistor Control” on page 231 reference to resistor value removed.
Figure 27-3 on page 230 0 and 1 inverted in the MUX controlled by PIO_MDSR..
05-346
05-497
3053
SPI: Section 28.7.5 ”SPI Status Register” on page 271 SPI_RCR, SPI_RNCR, SPI_TCR, SPI_TNCR
location defined.
Section 28.7.4 ”SPI Transmit Data Register” on page 270, LASTXFER: Last Transfer text added.
Section 28.7.2 ”SPI Mode Register” on page 267, PCSDEC: Chip Select Decode changed.
Updated Figure 28-1, Block Diagram on page 254, removed Note. Removed bit FDIV from Section 28.7.2
”SPI Mode Register” on page 267 and Section 28.7.9 ”SPI Chip Select Register” on page 276. LLB
description modified in Section 28.7.2 ”SPI Mode Register” on page 267.
Updated Figure 28-9, Slave Mode Functional Block Diagram on page 264 to remove FLOAD.
Updated information on SPI_RDR in Section 28.6.3 ”Master Mode Operations” on page 258. Added
information to SWRST bit description in Section 28.7.1 ”SPI Control Register” on page 266. Corrected
equations in DLYBCT bit description, Section 28.7.9 ”SPI Chip Select Register” on page 277.
Changes to Section 28.6.3.8 ”Mode Fault Detection” on page 263.
04-183
05-434
05-476
05-484
1542
1543
1676
USART:
Manchester Functionality Removed.
Section 30.4 ”I/O Lines Description” on page 299, text concerning TXD line added.
Section 30.6.1.3 ”Fractional Baud Rate in Asynchronous Mode” on page 303, using USART “functional
mode” changed to USART “normal mode”.
Table 30-3, “Binary and Decimal Values for Di,” on page 305 and Table 30-4, “Binary and Decimal
Values for Fi,” on page 305: DI and Fi properly referenced in titles.
Figure 30-25, IrDA Demodulator Operations on page 321 modified.
Section 30.6.4.1 ”ISO7816 Mode Overview” on page 317 clarification of PAR configuration added.
Section 30.6.7 ”Modem Mode” on page 323 Control of DTR and RTS output pins.
Table 30-2, “Baud Rate Example (OVER = 0),” on page 302 60k and 70k MHz clock speeds removed.
”Asynchronous Receiver” on page 307 2nd line in 4th paragraph changed.
”Receiver Time-out” on page 312 list of user options rewritten.
Section 30.7.1 ”USART Control Register” STTTO bit function related to TIMEOUT in US_CSR register
Section 30.7.6 ”USART Channel Status Register” TIMEOUT bit function related to STTO in US_CR
register
2768
1552
1770
2942
3023
TC: Section 32.5.3.6 ”External Event/Trigger Conditions” on page 395 “....(EEVT = 0), TIOB is no longer
used as an output and the compare register B is not used to generate waveforms and subsequently no
IRQs. Note
(1)
attached to ”EEVT: External Event Selection” in Section 32.6.7 ”TC Channel Mode
Register: Waveform Mode” on page 403 further clarifies this condition.
2704
PWM: Section 33.5.3.3 ”Changing the Duty Cycle or the Period”: updated info on waveform generation. 1677
Section 34. ”USB Device Port (UDP)” on page 435: Corrections, improvements, additions and deletions
throughout section, new source document.
Section 34.5.3.8 ”Sending a Device Remote Wakeup” replaces title “Sending an External Resume.
WAKEUP bit shown in interruput registers: Section 34.6.4 on page 458 thru Section 34.6.8 on page 463
RMWUPE, RSMINPR, ESR bits removed from Section 34.6.2 ”UDP Global State Register”
NOTE: pertinent to USB pullup effect on USB Reset added to Section 34.6.12 ”UDP Transceiver Control
Register”.
3288
Version
6120F Comments
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