Datasheet
636
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
Version
6120F Comments
Change
Request
Ref.
AT91SAM7X512 added to product family. ”Features” on page 1, ”Description” on page 3 Global and
TFBGA package to Section 4. ”Package”, Section 39. ”AT91SAM7X512/256/128 Mechanical
Characteristics” and Section 40. ”AT91SAM7X Ordering Informationì”.
Section 4.1 ”100-lead LQFP Package Outline” and Section 4.3 ”100-ball TFBGA Package Outline”
Replace “...Mechanical Overview”
Peripheral and System Controller Memory Maps consolidated in Figure 8-1 on page 18
Internal Memory Area 3 is “Internal ROM” Figure 18-3 on page 93
#2724
Section 10.1 ”User Interface” User Peripherals are mapped between 0xF000 0000 and 0XFFFF EFFF.
Table 10-1 on page 31 SYSIRQ changed to SYSC in “Peripheral Identifiers”.
rfo review
IP Block Evolution:
RSTC: Section 13.3 ”Functional Description” on page 58, added information on startup counter for crystal
oscillator.
3005
RTT: Section 14.3 ”Functional Description”: Note (asynchronization between SCLK and MCK) added to
end of section.
2522
WDT: ”Block Diagram” on page 83 replaced. (WV changed to WDV) ”Functional Description” on page 84
6th and 7th paragraph changed.
3002
EFC: Section 19. ”Embedded Flash Controller (EFC)” updated to reflect EFC configuration for
AT91SAM7X512 with multiple EFCs.
2356
3086
FFPI: information added to Section 20.2.5.6 and Section 20.3.4.6 ”Flash Security Bit Command”, added
Section 20.2.5.7 and Section 20.3.4.7 ”AT91SAM7X512 Select EFC Command”
rfo/2284
AT91SAM Boot Program: ”Hardware and Software Constraints” on page 138 SAM7X512 added
”SAM-BA Boot” on page 134, SAM-BA boot principle changed
”Flow Diagram” on page 133 replaced Figure 21-1
2285/2618
3050
PDC: Corrected description of user interface in Section 22.1 ”Overview” on page 139.
Corrected bit name to ENDTX in Section 22.3.3 ”Transfer Counters” on page 140.
05-460
AIC: Section 23.7.3.1 ”Priority Controller” on page 156: incorrect reference of SRCTYPE field to
AIC_SVR register changed to AIC_SMR register.
Section 23.8 ”Advanced Interrupt Controller (AIC) User Interface” on page 164, Table 23-2: Added note
(2)
in reference to PID2...PID31 bit fields.
Naming convention for AIC_FVR register harmonized in Table 23-2, Section 23.8.6 ”AIC FIQ Vector
Register” on page 167 and Section 23.7.4.5 ”Fast Forcing” on page 160.
2512
2548
PMC: Section 25.7 ”Programming Sequence” on page 181 change to Step 4. on page 182, “Selection of
Master Clock and Processor Clock” and to code.
Corrected name of bitfield PRES in Section 25.9.10 ”PMC Master Clock Register” on page 197.
Removed reference to PMC_ACKR register in Table 25-2, “Register Mapping,” on page 188.
Updated OUTx bit descriptions in Section 25.9.9 ”PMC Clock Generator PLL Register” on page 196.
Added note defining PIDx in Section 25.9.4 ”PMC Peripheral Clock Enable Register” on page 192,
Section 25.9.5 ”PMC Peripheral Clock Disable Register” on page 192 and Section 25.9.6 ”PMC
Peripheral Clock Status Register” on page 193.
Changed Section 24.2 ”Slow Clock RC Oscillator” on page 175.
05-506
1603
1719
2467, 2913
2468
1558
DBGU: Corrected references from ice_nreset to Power-on Reset in Figure 26-1 on page 204, Functional
Block Diagram, and in FNTRST bit description in Section 26.5.12 ”Debug Unit Force NTRST Register” on
page 226.
2832