Datasheet

454
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
34.6 USB Device Port (UDP) User Interface
WARNING: The UDP peripheral clock in the Power Management Controller (PMC) must be enabled before any read/write
operations to the UDP registers including the UDP_TXCV register.
Notes: 1. The addresses of the UDP_ CSRx registers are calculated as: 0x030 + 4(Endpoint Number - 1).
2. The addresses of the UDP_ FDRx registers are calculated as: 0x050 + 4(Endpoint Number - 1).
3. See Warning above the ”UDP Memory Map” on this page.
Table 34-4. UDP Memory Map
Offset Register Name Access Reset State
0x000 Frame Number Register UDP_ FRM_NUM Read 0x0000_0000
0x004 Global State Register UDP_ GLB_STAT Read/Write 0x0000_0000
0x008 Function Address Register UDP_ FADDR Read/Write 0x0000_0100
0x00C Reserved – – –
0x010 Interrupt Enable Register UDP_ IER Write
0x014 Interrupt Disable Register UDP_ IDR Write
0x018 Interrupt Mask Register UDP_ IMR Read 0x0000_1200
0x01C Interrupt Status Register UDP_ ISR Read 0x0000_XX00
0x020 Interrupt Clear Register UDP_ ICR Write
0x024 Reserved – – –
0x028 Reset Endpoint Register UDP_ RST_EP Read/Write
0x02C Reserved – – –
0x030 Endpoint 0 Control and Status Register UDP_CSR0 Read/Write 0x0000_0000
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See Note:
(1)
Endpoint 5 Control and Status Register UDP_CSR5 Read/Write 0x0000_0000
0x050 Endpoint 0 FIFO Data Register UDP_ FDR0 Read/Write 0x0000_0000
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See Note:
(2)
Endpoint 5 FIFO Data Register UDP_ FDR5 Read/Write 0x0000_0000
0x070 Reserved – – –
0x074 Transceiver Control Register UDP_ TXVC
(3)
Read/Write 0x0000_0000
0x078 - 0xFC Reserved – – –