Datasheet

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6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
11. ARM7TDMI Processor Overview
11.1 Overview
The ARM7TDMI core executes both the 32-bit ARM
®
and 16-bit Thumb
®
instruction sets, allow-
ing the user to trade off between high performance and high code density.The ARM7TDMI
processor implements Von Neuman architecture, using a three-stage pipeline consisting of
Fetch, Decode, and Execute stages.
The main features of the ARM7tDMI processor are:
• ARM7TDMI Based on ARMv4T Architecture
• Two Instruction Sets
–ARM
®
High-performance 32-bit Instruction Set
–Thumb
®
High Code Density 16-bit Instruction Set
• Three-Stage Pipeline Architecture
– Instruction Fetch (F)
– Instruction
Decode (D)
– Execute (E)