Datasheet

286
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
29.6 TWI User Interface
29.6.1 Register Mapping
Table 29-2. Two-wire Interface (TWI) User Interface
Offset Register Name Access Reset Value
0x0000 Control Register TWI_CR Write-only N/A
0x0004 Master Mode Register TWI_MMR Read/Write 0x0000
0x0008 Reserved - - -
0x000C Internal Address Register TWI_IADR Read/Write 0x0000
0x0010 Clock Waveform Generator Register TWI_CWGR Read/Write 0x0000
0x0020 Status Register TWI_SR Read-only 0x0008
0x0024 Interrupt Enable Register TWI_IER Write-only N/A
0x0028 Interrupt Disable Register TWI_IDR Write-only N/A
0x002C Interrupt Mask Register TWI_IMR Read-only 0x0000
0x0030 Receive Holding Register TWI_RHR Read-only 0x0000
0x0034 Transmit Holding Register TWI_THR Read/Write 0x0000
0x0038 - 0x00FC Reserved – – –