Datasheet

255
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
28.4 Signal Description
28.5 Product Dependencies
28.5.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the SPI pins to their peripheral
functions.
28.5.2 Power Management
The SPI may be clocked through the Power Management Controller (PMC), thus the program-
mer must first configure the PMC to enable the SPI clock.
28.5.3 Interrupt
The SPI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC).
Handling the SPI interrupt requires programming the AIC before configuring the SPI.
Table 28-1. Signal Description
Pin Name Pin Description
Type
Master Slave
MISO Master In Slave Out Input Output
MOSI Master Out Slave In Output Input
SPCK Serial Clock Output Input
NPCS1-NPCS3 Peripheral Chip Selects Output Unused
NPCS0/NSS Peripheral Chip Select/Slave Select Output Input