Datasheet

237

6120F–ATARM–03-Oct-06

AT91SAM7X512/256/128 Preliminary

Notes: 1. Reset value of PIO_PSR depends on the product implementation.

2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.

3. Reset value of PIO_PDSR depends on the level of the I/O lines.

4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have

occurred.

5. Only this set of registers clears the status by writing 1 in the first register and sets the status by writing 1 in the second

0x0070 Peripheral A Select Register

(5)

PIO_ASR Write-only –

0x0074 Peripheral B Select Register

(5)

PIO_BSR Write-only –

0x0078 AB Status Register

(5)

PIO_ABSR Read-only 0x00000000

0x007C - 0x009C Reserved

0x00A0 Output Write Enable PIO_OWER Write-only –

0x00A4 Output Write Disable PIO_OWDR Write-only –

0x00A8 Output Write Status Register PIO_OWSR Read-only 0x00000000

0x00AC - 0x00FC Reserved

Table 27-2. Parallel Input/Output Controller (PIO) Register Mapping (Continued)

Offset Register Name Access Reset Value