Datasheet

153
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
Each status referred to above can be used to optimize the interrupt handling of the systems.
23.7.1.5 Internal Interrupt Source Input Stage
Figure 23-4. Internal Interrupt Source Input Stage
23.7.1.6 External Interrupt Source Input Stage
Figure 23-5. External Interrupt Source Input Stage
Edge
Detector
ClearSet
Source i
AIC_IPR
AIC_IMR
AIC_IECR
AIC_IDCR
AIC_ISCR
AIC_ICCR
Fast Interrupt Controller
or
Priority Controller
FF
Level/
Edge
AIC_SMRI
(SRCTYPE)
Edge
Detector
ClearSet
Pos./Neg.
AIC_ISCR
AIC_ICCR
Source i
FF
Level/
Edge
High/Low
AIC_SMRi
SRCTYPE
AIC_IPR
AIC_IMR
AIC_IECR
AIC_IDCR
Fast Interrupt Controller
or
Priority Controller