Datasheet

131
6120F–ATARM–03-Oct-06
AT91SAM7X512/256/128 Preliminary
GP NVM bits can be read using Get Fuse Bit command (GFB). When a bit set in the Bit Mask
is returned, then the corresponding fuse bit is set.
20.3.4.6 Flash Security Bit Command
Security bits can be set using Set Security Bit command (SSE). Once the security bit is
active, the Fast Flash programming is disabled. No other command can be run. Only an event
on the Erase pin can erase the security bit once the contents of the Flash have been erased.
The AT91SAM7X512 security bit is controlled by the EFC0. To use the Set Security Bit com-
mand, the EFC0 must be selected using the Select EFC command.
20.3.4.7 AT91SAM7X512 Select EFC Command
The commands WPx, EA, xLB, xFB are executed using the current EFC controller. The default
EFC controller is EFC0. The Select EFC command (SEFC) allows selection of the current
EFC controller.
20.3.4.8 Memory Write Command
This command is used to perform a write access to any memory location.
The Memory Write command (WRAM) is optimized for consecutive writes. An internal
address buffer is automatically increased.
Table 20-25. Get General-purpose NVM Bit Command
Read/Write DR Data
Write GFB
Read Bit Mask
Table 20-26. Set Security Bit Command
Read/Write DR Data
Write SSE
Table 20-27. Select EFC Command
Step Handshake Sequence MODE[3:0] DATA[15:0]
1 Write handshaking CMDE SEFC
2 Write handshaking DATA
0 = Select EFC0
1 = Select EFC1
Table 20-28. Write Command
Read/Write DR Data
Write (Number of Words to Write) << 16 | (WRAM)
Write Address
Write Memory [address]
Write Memory [address+4]
Write Memory [address+8]
Write Memory [address+(Number of Words to Write - 1)* 4]