Datasheet

200
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
25.9 Power Management Controller (PMC) User Interface
Notes: 1. UDP bit of this register doe not pertain to SAM7S32/16.
2. USBDIV bit of this register does not pertain to SAM7S32/16
Table 25-2. Register Mapping
Offset Register Name Access Reset
0x0000 System Clock Enable Register PMC_SCER
(1)
Write-only –
0x0004 System Clock Disable Register PMC_SCDR
(1)
Write-only –
0x0008 System Clock Status Register PMC _SCSR
(1)
Read-only 0x01
0x000C Reserved – – –
0x0010 Peripheral Clock Enable Register PMC _PCER Write-only –
0x0014 Peripheral Clock Disable Register PMC_PCDR Write-only –
0x0018 Peripheral Clock Status Register PMC_PCSR Read-only 0x0
0x001C Reserved – – –
0x0020 Main Oscillator Register CKGR_MOR Read-write 0x0
0x0024 Main Clock Frequency Register CKGR_MCFR Read-only 0x0
0x0028 Reserved – – –
0x002C PLL Register CKGR_PLLR
(2)
Read-write 0x3F00
0x0030 Master Clock Register PMC_MCKR Read-write 0x0
0x0038 Reserved – – –
0x003C Reserved – – –
0x0040 Programmable Clock 0 Register PMC_PCK0 Read-write 0x0
0x0044 Programmable Clock 1 Register PMC_PCK1 Read-write 0x0
0x0048 Programmable Clock 2 Register PMC_PCK2 Read-write 0x0
... ... ... ... ...
0x0060 Interrupt Enable Register PMC_IER Write-only --
0x0064 Interrupt Disable Register PMC_IDR Write-only --
0x0068 Status Register PMC_SR Read-only 0x08
0x006C Interrupt Mask Register PMC_IMR Read-only 0x0
0x0070 - 0x007C Reserved – – –