Datasheet

511
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
3. The microcontroller is notified that the USB device has received a data payload polling RX_DATA_BK0 in
the endpoint’s UDP_ CSRx register. An interrupt is pending for this endpoint while RX_DATA_BK0 is set.
4. The number of bytes available in the FIFO is made available by reading RXBYTECNT in the endpoint’s
UDP_ CSRx register.
5. The microcontroller carries out data received from the endpoint’s memory to its memory. Data received is
available by reading the endpoint’s UDP_ FDRx register.
6. The microcontroller notifies the USB device that it has finished the transfer by clearing RX_DATA_BK0 in
the endpoint’s UDP_ CSRx register.
7. A new Data OUT packet can be accepted by the USB device.
Figure 35-9. Data OUT Transfer for Non Ping-pong Endpoints
An interrupt is pending while the flag RX_DATA_BK0 is set. Memory transfer between the USB device, the FIFO
and microcontroller memory can not be done after RX_DATA_BK0 has been cleared. Otherwise, the USB device
would accept the next Data OUT transfer and overwrite the current Data OUT packet in the FIFO.
35.5.2.7 Using Endpoints With Ping-pong Attributes
During isochronous transfer, using an endpoint with ping-pong attributes is obligatory. To be able to guarantee a
constant bandwidth, the microcontroller must read the previous data payload sent by the host, while the current
data payload is received by the USB device. Thus two banks of memory are used. While one is available for the
microcontroller, the other one is locked by the USB device.
ACK
PID
Data OUTNAK
PIDPIDPIDPIDPID
Data OUT2ACKData OUT
Data OUT 1
USB Bus
Packets
RX_DATA_BK0
Set by USB Device
Cleared by Firmware,
Data Payload Written in FIFO
FIFO (DPR)
Content
Written by USB Device Microcontroller Read
Data OUT 1 Data OUT 1 Data OUT 2
Host Resends the Next Data Payload
Microcontroller Transfers Data
Host Sends Data Payload
Data OUT2
Data OUT2
Host Sends the Next Data Payload
Written by USB Device
(UDP_CSRx)
Interrupt Pending