Datasheet

12
1732FS–ATARM–12-Apr-06
AT91R40008
8.1 System Peripherals
8.1.1 PS: Power-saving
The Power-saving feature optimizes power consumption, enabling the software to stop the
ARM7TDMI clock (Idle mode), restarting it when the module receives an interrupt (or reset). It
also enables on-chip peripheral clocks to be enabled and disabled individually, matching
power consumption and application need.
8.1.2 AIC: Advanced Interrupt Controller
The Advanced Interrupt Controller has an 8-level priority, individually maskable, vectored
interrupt controller, and drives the NIRQ and NFIQ pins of the ARM7TDMI from:
• The external fast interrupt line (FIQ)
• The three external interrupt request lines (IRQ0 - IRQ2)
• The interrupt signals from the on-chip peripherals
The AIC is extensively programmable offering maximum flexibility, and its vectoring features
reduce the real-time overhead in handling interrupts.
The AIC also features a spurious vector, which reduces spurious interrupt handling to a mini-
mum, and a protect mode that facilitates the debug capabilities.
8.1.3 PIO: Parallel I/O Controller
The AT91R40008 microcontroller has 32 programmable I/O lines. Six pins are dedicated as
general-purpose I/O pins. Other I/O lines are multiplexed with an external signal of a periph-
eral to optimize the use of available package pins. The PIO controller enables generation of an
interrupt on input change on any of the PIO pins.
8.1.4 WD: Watchdog
The Watchdog is built around a 16-bit counter and is used to prevent system lock-up if the soft-
ware becomes trapped in a deadlock. It can generate an internal reset or interrupt, or assert
an active level on the dedicated pin NWDOVF. All programming registers are password-pro-
tected to prevent unintentional programming.
8.1.5 SF: Special Function
The AT91R40008 microcontroller provides registers that implement the following special
functions:
• Chip identification
• RESET status
• Protect mode