Datasheet

7
1779ES–ATARM–14-Apr-06
AT91M42800A
CLOCK
XIN Oscillator Input or External Clock Input
XOUT Oscillator Output Output
PLLRCA RC Filter for PLL A Input
PLLRCB RC Filter for PLL B Input
MCKO Clock Output Output
Test and
Reset
NRST Hardware Reset Input Input Low Schmitt trigger
MODE0 - MODE1 Mode Selection Input
JTAG/ICE
TMS Test Mode Select Input Schmitt trigger, internal pull-up
TDI Test Data In Input Schmitt trigger, internal pull-up
TDO Test Data Out Output
TCK Test Clock Input Schmitt trigger, internal pull-up
NTRST Test Reset Input Input Low Schmitt trigger, internal pull-up
Emulation NTRI Tri-state Mode Enable Input Low Sampled during reset
Power
VDDIO I/O Power Power 3V or 5V nominal supply
VDDCORE Core Power Power 3V nominal supply
VDDPLL PLL Power Power 3V nominal supply
GND Ground Ground
Table 3-1. AT91M42800A Pin Description (Continued)
Module Name Function Type
Active
Level Comments