Datasheet
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1779ES–ATARM–14-Apr-06
AT91M42800A
internal interrupt signal that can be programmed to generate processor interrupts via the AIC
(Advanced Interrupt Controller).
The Timer/Counter block has two global registers that act upon all three TC channels. The Block
Control Register allows the three channels to be started simultaneously with the same instruc-
tion. The Block Mode Register defines the external clock inputs for each Timer/Counter channel,
allowing them to be chained.
Each Timer/Counter block operates independently and has a complete set of block and channel
registers.
8.5.3 SPI: Serial Peripheral Interface
The AT91M42800A includes two SPIs that provide communication with external devices in Mas-
ter or Slave mode. They are independent, and are referred to by the letters A and B. Each SPI
has four external chip selects that can be connected to up to 15 devices. The data length is pro-
grammable from 8- to 16-bit.