Datasheet

4
1348FS–ATARM–13-Apr-06
AT91M40800
4. Block Diagram
Figure 4-1. AT91M40800
ARM7TDMI Core
Embedded
ICE
Reset
EBI: External Bus Interface
ASB
Controller
Clock
AIC: Advanced
Interrupt Controller
AMBA Bridge
EBI User
Interface
TC: Timer
Counter
TC0
TC1
TC2
USART0
USART1
2 PDC
Channels
2 PDC
Channels
PIO: Parallel I/O Controller
PS: Power Saving
Chip ID
WD: Watchdog
Timer
APB
ASB
P
I
O
P
I
O
NRST
D0-D15
A1-A19
A0/NLB
NRD/NOE
NWR0/NWE
NWR1/NUB
NWAIT
NCS0
NCS1
P26/NCS2
P27/NCS3
P28/A20/CS7
P29/A21/CS6
P30/A22/CS5
P31/A23/CS4
P0/TCLK0
P3/TCLK1
P6/TCLK2
P1/TIOA0
P2/TIOB0
P4/TIOA1
P5/TIOB1
P7/TIOA2
P8/TIOB2
NWDOVF
TMS
TDO
TDI
TCK
MCKI
P25/MCKO
P12/FIQ
P9/IRQ0
P10/IRQ1
P11/IRQ2
P13/SCK0
P14/TXD0
P15/RXD0
P20/SCK1
P21/TXD1/NTRI
P22/RXD1
P16
P17
P18
P19
P23
P24/BMS
8K-byte RAM