Datasheet

87
7593L–AVR–09/12
AT90USB64/128
ALE/HWB – Port E, bit 2
ALE is the external data memory Address latch enable.
HWB allows to execute the boot loader section after reset when tied to ground during external
reset pulse. The HWB mode of this pin is active only when the HWBE fuse is enable.
•RD
– Port E, bit 1
RD
is the external data memory read control enable.
•WR
– Port E, bit 0
WR
is the external data memory write control enable.
Table 11-16. Overriding signals for alternate functions PE7..PE4.
Signal
name
PE7/INT7/AIN.1/
UVCON PE6/INT6/AIN.0 PE5/INT5/TOSC1 PE4/INT4/TOSC2
PUOE 0 0 0 0
PUOV 0 0 0 0
DDOE UVCONE 0 0 0
DDOV UVCONE 0 0 0
PVOE UVCONE 0 0 0
PVOV UVCON 0 0 0
DIEOE INT7 ENABLE INT6 ENABLE INT5 ENABLE INT4 ENABLE
DIEOV 1 1 1 1
DI INT7 INPUT INT6 INPUT INT5 INPUT INT4 INPUT
AIO AIN1 INPUT AIN0 INPUT
Table 11-17. Overriding signals for alternate functions in PE3..PE0.
Signal
name PE3/UID PE2/ALE/HWB PE1/RD
PE0/WR
PUOE UIDE 0 SRE SRE
PUOV 1 0 0 0
DDOE UIDE SRE SRE SRE
DDOV 0 1 1 0
PVOE 0 SRE SRE SRE
PVOV 0 ALE RD WR
DIEOE UIDE 0 0 0
DIEOV 1 0 0 1
DI UID HWB
PE0 0 0 0 0
AIO