Datasheet

50
7593L–AVR–09/12
AT90USB64/128
Note: 1. For Atmel AT90USB128x only. Do not use with Atmel AT90USB64x.
2. For AT90USB64x only. Do not use with AT90USB128x.
• Bit 1 – PLLE: PLL Enable
When the PLLE is set, the PLL is started.
• Bit 0 – PLOCK: PLL Lock Detector
When the PLOCK bit is set, the PLL is locked to the reference clock. After the PLL is enabled, it
takes about 100ms for the PLL to lock.
To clear PLOCK, clear PLLE and PLLPx bits.
Table 7-11. PLL input prescaler configurations.
PLLP2 PLLP1 PLLP0 Clock division factor
External XTAL required for USB
operation [MHz]
000 Reserved -
001 Reserved -
010 Reserved -
011 4 8
100 Reserved -
101 8
(1)
16
(1)
110 8
(2)
16
(2)
111 Reserved -