Datasheet

vi
7593L–AVR–09/12
AT90USB64X/128X
24.8 Address setup ...................................................................................................288
24.9 Remote wake-up detection ................................................................................288
24.10 USB pipe reset ................................................................................................288
24.11 Pipe data access .............................................................................................288
24.12 Control pipe management ...............................................................................289
24.13 OUT pipe management ...................................................................................289
24.14 IN Pipe management .......................................................................................290
24.15 Interrupt system ...............................................................................................291
24.16 Registers .........................................................................................................292
25 Analog Comparator ............................................................................. 304
25.1 Analog Comparator multiplexed input ...............................................................306
26 ADC – Analog to Digital Converter ..................................................... 307
26.1 Features ............................................................................................................307
26.2 Overview ...........................................................................................................307
26.3 Operation ...........................................................................................................309
26.4 Starting a conversion .........................................................................................309
26.5 Prescaling and conversion timing ......................................................................310
26.6 Changing channel or reference selection ..........................................................313
26.7 ADC noise canceler ...........................................................................................314
26.8 ADC conversion result .......................................................................................318
26.9 ADC register description ...................................................................................321
27 JTAG interface and on-chip debug system ....................................... 327
27.1 Overview ...........................................................................................................327
27.2 TAP – Test Access Port ....................................................................................327
27.3 TAP Controller ...................................................................................................329
27.4 Using the Boundary-scan chain ........................................................................330
27.5 Using the on-chip debug system .......................................................................330
27.6 On-chip debug specific JTAG instructions .........................................................331
27.7 On-chip Debug related Register in I/O memory ................................................332
27.8 Using the JTAG programming capabilities ........................................................332
27.9 Bibliography .......................................................................................................332
28 IEEE 1149.1 (JTAG) boundary-scan ................................................... 333
28.1 Features ............................................................................................................333
28.2 System overview ...............................................................................................333
28.3 Data registers ....................................................................................................333