Datasheet

7593L–AVR–09/12

AT90USB64/128

stated the lines. Writing XMBK to zero disables the bus keeper. XMBK is not qualified with SRE,

so even if the XMEM interface is disabled, the bus keepers are still activated as long as XMBK is

one.

• Bit 6..3 – Res: Reserved Bits

These bits are reserved and will always read as zero. When writing to this address location,

write these bits to zero for compatibility with future devices.

• Bit 2..0 – XMM2, XMM1, XMM0: External Memory High Mask

When the External Memory is enabled, all Port C pins are default used for the high address byte.

If the full 60KB address space is not required to access the External Memory, some, or all, Port

C pins can be released for normal Port Pin function as described in Table 6-6. As described in

“Using all 64KB locations of external memory” on page 38, it is possible to use the XMMn bits to

access all 64KB locations of the External Memory.

6.5.8 Using all locations of external memory smaller than 64KB

Since the external memory is mapped after the internal memory as shown in Figure 6-4 on page

31, the external memory is not addressed when addressing the first 8,448/4,352 bytes

(128/64Kbytes version) of data space. It may appear that the first 8,448/4,352 bytes of the exter-

nal memory are inaccessible (external memory addresses 0x0000 to 0x10FF or 0x0000 to

0x20FF). However, when connecting an external memory smaller than 64KB, for example 32KB,

these locations are easily accessed simply by addressing from address 0x8000 to 0xA1FF.

Since the External Memory Address bit A15 is not connected to the external memory, addresses

0x8000 to 0xA1FF will appear as addresses 0x0000 to 0x21FF for the external memory.

Addressing above address 0xA1FF is not recommended, since this will address an external

memory location that is already accessed by another (lower) address. To the Application soft-

ware, the external 32KB memory will appear as one linear 32KB address space from 0x2200 to

0xA1FF. This is illustrated in Figure 6-10 on page 38.

Table 6-6. Port C pins released as normal port pins when the external memory is enabled.

XMM2 XMM1 XMM0 # bits for external memory address Released port pins

0 0 0 8 (full 56KB space) None

0017 PC7

0106 PC7 - PC6

0115 PC7 - PC5

1004 PC7 - PC4

1013 PC7 - PC3

1102 PC7 - PC2

1 1 1 No address high bits Full Port C