Datasheet

363
7593L–AVR–09/12
AT90USB64/128
Figure 30-1. Parallel programming
(1)
.
Note: 1. Unused pins should be left floating.
Table 30-6. Pin name mapping.
Signal name in
programming mode Pin name I/O Function
RDY/BSY
PD1 O
0: Device is busy programming
1: Device is ready for new command
OE PD2 I Output Enable (active low)
WR
PD3 I Write Pulse (active low)
BS1 PD4 I Byte Select 1
XA0 PD5 I XTAL Action Bit 0
XA1 PD6 I XTAL Action Bit 1
PAGEL PD7 I Program Memory and EEPROM data Page Load
BS2 PA0 I Byte Select 2
DATA PB7-0 I/O Bi-directional Data bus (Output when OE is low
)
Table 30-7. BS2 and BS1 encoding.
BS2 BS1
Flash/EEPROM
address
Flash data
loading/reading
Fuse
programming
Reading fuse and
lock bits
00Low Byte Low Byte Low Byte Fuse Low Byte
0 1 High Byte High Byte High Byte Lock-bits
10
Extended High
Byte
Reserved Extended Byte
Extended Fuse
Byte
11Reserved Reserved Reserved Fuse High Byte
VCC
+5V
GND
XTAL1
PD1
PD2
PD3
PD4
PD5
PD6
PB7 - PB0 DATA
RESET
PD7
+12V
BS1
XA0
XA1
OE
RDY/BSY
PAGEL
PA0
WR
BS2
AVCC
+5V