Datasheet

340
7593L–AVR–09/12
AT90USB64/128
28.7 Atmel AT90USB64/128 Boundary-scan order
Table 28-3 shows the Scan order between TDI and TDO when the Boundary-scan chain is
selected as data path. Bit 0 is the LSB; the first bit scanned in, and the first bit scanned out. The
scan order follows the pin-out order as far as possible. Therefore, the bits of Port A and Port Fis
scanned in the opposite bit order of the other ports. Exceptions from the rules are the Scan
chains for the analog circuits, which constitute the most significant bits of the scan chain regard-
less of which physical pin they are connected to. In Figure 28-3 on page 338, PXn. Data
corresponds to FF0, PXn. Control corresponds to FF1, PXn. Bit 4, 5, 6 and 7 of Port F is not in
the scan chain, since these pins constitute the TAP pins when the JTAG is enabled. The USB
pads are not included in the boundary-scan.
Table 28-3. AT90USB64/128 Boundary-scan order.
Bit number Signal name Module
88 PE6.Data
Port E
87 PE6.Control
86 PE7.Data
85 PE7.Control
84 PE3.Data
83 PE3.Control
82 PB0.Data
Port B
81 PB0.Control
80 PB1.Data
79 PB1.Control
78 PB2.Data
77 PB2.Control
76 PB3.Data
75 PB3.Control
74 PB4.Data
73 PB4.Control
72 PB5.Data
71 PB5.Control
70 PB6.Data
69 PB6.Control
68 PB7.Data
67 PB7.Control
66 PE4.Data
PORTE
65 PE4.Control
64 PE5.Data
63 PE5.Control
62 RSTT Reset Logic (observe only)