Datasheet

321
7593L–AVR–09/12
AT90USB64/128
Example 1:
– ADMUX = 0xED (ADC3 - ADC2, 10× gain, 2.56V reference, left adjusted result)
– Voltage on ADC3 is 300mV, voltage on ADC2 is 500mV.
– ADCR = 512 × 10 × (300 - 500) / 2560 = -400 = 0x270
–ADCL will thus read 0x00, and ADCH will read 0x9C.
Writing zero to ADLAR right adjusts the result: ADCL = 0x70, ADCH = 0x02.
Example 2:
– ADMUX = 0xFB (ADC3 - ADC2, 1× gain, 2.56V reference, left adjusted result)
– Voltage on ADC3 is 300mV, voltage on ADC2 is 500mV.
– ADCR = 512 × 1 × (300 - 500) / 2560 = -41 = 0x029.
–ADCL will thus read 0x40, and ADCH will read 0x0A.
Writing zero to ADLAR right adjusts the result: ADCL = 0x00, ADCH = 0x29.
26.9 ADC register description
26.9.1 ADMUX – ADC Multiplexer Selection Register
• Bit 7:6 – REFS1:0: Reference Selection bits
These bits select the voltage reference for the ADC, as shown in Table 26-3 on page 322. If
these bits are changed during a conversion, the change will not go in effect until this conversion
Table 26-2. Correlation between input voltage and output codes.
V
ADCn
Read code Corresponding decimal value
V
ADCm
+ V
REF
/GAIN 0x1FF 511
V
ADCm
+ 0.999 V
REF
/GAIN 0x1FF 511
V
ADCm
+ 0.998 V
REF
/GAIN 0x1FE 510
... ... ...
V
ADCm
+ 0.001 V
REF
/GAIN 0x001 1
V
ADCm
0x000 0
V
ADCm
- 0.001 V
REF
/GAIN 0x3FF -1
... ... ...
V
ADCm
- 0.999 V
REF
/GAIN 0x201 -511
V
ADCm
- V
REF
/GAIN 0x200 -512
Bit 76543210
REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0 ADMUX
Read/write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 00000000