Datasheet

31
7593L–AVR–09/12
AT90USB64/128
6.5 External memory interface
With all the features the External Memory Interface provides, it is well suited to operate as an
interface to memory devices such as External SRAM and Flash, and peripherals such as LCD-
display, A/D, and D/A. The main features are:
Four different wait-state settings (including no wait-state)
Independent wait-state setting for different external Memory sectors (configurable sector size)
The number of bits dedicated to address high byte is selectable
Bus keepers on data lines to minimize current consumption (optional)
6.5.1 Overview
When the eXternal MEMory (XMEM) is enabled, address space outside the internal SRAM
becomes available using the dedicated External Memory pins (see Figure 2-1 on page 6, Table
11-3 on page 78, and Table 11-9 on page 82). The memory configuration is shown in Figure 6-4.
Figure 6-4. External memory with sector select.
6.5.2 Using the external memory interface
The interface consists of:
AD7:0: Multiplexed low-order address bus and data bus
A15:8: High-order address bus (configurable number of bits)
ALE: Address latch enable
•RD
: Read strobe
•WR
: Write strobe
The control bits for the External Memory Interface are located in two registers, the External
Memory Control Register A – XMCRA, and the External Memory Control Register B – XMCRB.
Memory configuration A
0x0000
External memory
(0-60K x 8)
0xFFFF
Internal memory
SRL[2..0]
SRW11
SRW10
SRW01
SRW00
Lower sector
Upper sector
ISRAM end
XMem start