Datasheet

304
7593L–AVR–09/12
AT90USB64/128
25. Analog Comparator
The Analog Comparator compares the input values on the positive pin AIN0 and negative pin
AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on the negative pin
AIN1, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in Figure 25-1.
The Power Reduction ADC bit, PRADC, in “PRR0 – Power Reduction Register 0” on page 54
must be disabled by writing a logical zero to be able to use the ADC input MUX.
Figure 25-1. Analog Comparator block diagram
(2)
.
Notes: 1. See Table 25-2 on page 306.
2. Refer to Figure 1-1 on page 3 and Table 11-6 on page 79 for Analog Comparator pin
placement.
25.0.1 ADCSRB – ADC Control and Status Register B
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is w ritten
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed
description of this bit, see “Analog Comparator multiplexed input” on page 306.
25.0.2 ACSR – Analog Comparator Control and Status Register
ACBG
BANDGAP
REFERENCE
ADC MULTIPLEXER
OUTPUT
ACME
ADEN
(1)
Bit 7 6543210
–ACME– – - ADTS2 ADTS1 ADTS0 ADCSRB
Read/write R R/W R R R R/W R/W R/W
Initial value0 0000000
Bit 76543210
ACD ACBG ACO ACI ACIE ACIC ACIS1 ACIS0 ACSR
Read/write R/W R/W R R/W R/W R/W R/W R/W
Initial value 0 0 N/A 0 0 0 0 0