Datasheet

276
7593L–AVR–09/12
AT90USB64/128
• 1 - Reserved
The value read from this bits is always 0. Do not set this bit
• 0 - SUSPE - Suspend Interrupt Enable Bit
Set to enable the SUSPI interrupt.
Clear to disable the SUSPI interrupt.
• 7 - ADDEN - Address Enable Bit
Set to activate the UADD (USB address).
Cleared by hardware. Clearing by software has no effect.
See Section 23.7, page 264 for more details.
• 6-0 - UADD6:0 - USB Address Bits
Load by software to configure the device address.
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2-0 - FNUM10:8 - Frame Number Upper Value
Set by hardware. These bits are the three MSB of the 11-bits Frame Number information. They
are provided in the last received SOF packet. FNUM is updated if a corrupted SOF is received.
• Frame Number Lower Value
Set by hardware. These bits are the eight LSB of the 11-bits Frame Number information.
• 7-5 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 4 - FNCERR -Frame Number CRC Error flag
Set by hardware when a corrupted Frame Number in start of frame packet is received.
This bit and the SOFI interrupt are updated at the same time.
Bit 76543210
ADDEN UADD6:0 UDADDR
Read/write W R/W R/W R/W R/W R/W R/W R/W
Initial value00000000
Bit 76543 2 1 0
----- FNUM10:8 UDFNUMH
Read/writeRRRRRRRR
Initial value00000 0 0 0
Bit 76543210
FNUM7:0 UDFNUML
Read/writeRRRRRRRR
Initial value00000000
Bit 76543210
- - - FNCERR - - - - UDMFN
Read/write R
Initial value00000000