Datasheet

263
7593L–AVR–09/12
AT90USB64/128
• the UEINTX, UESTA0X and UESTA1X are restored to their reset value
The data toggle field remains unchanged.
The other registers remain unchanged.
The endpoint configuration remains active and the endpoint is still enabled.
The endpoint reset may be associated with a clear of the data toggle command (RSTDT bit) as
an answer to the CLEAR_FEATURE USB command.
23.4 USB reset
When an USB reset is detected on the USB line, the next operations are performed by the
controller:
• all the endpoints are disabled
• the default control endpoint remains configured (see Section 23.3, page 262 for more details)
23.5 Endpoint selection
Prior to any operation performed by the CPU, the endpoint must first be selected. This is done
by setting the EPNUM2:0 bits (UENUM register) with the endpoint number which will be man-
aged by the CPU.
The CPU can then access to the various endpoint registers and data.
23.6 Endpoint activation
The endpoint is maintained under reset as long as the EPEN bit is not set.
The following flow must be respected in order to activate an endpoint: