Datasheet

25
7593L–AVR–09/12
AT90USB64/128
6.3.2 EEARH and EEARL – The EEPROM Address Register
• Bits 15..12 – Res: Reserved bits
These bits are reserved bits in the Atmel AT90USB64/128 and will always read as zero.
• Bits 11..0 – EEAR8..0: EEPROM address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the 4K
bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and 4096.
The initial value of EEAR is undefined. A proper value must be written before the EEPROM may
be accessed.
6.3.3 EEDR – The EEPROM Data Register
• Bits 7..0 – EEDR7.0: EEPROM data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
6.3.4 EECR – The EEPROM Control Register
• Bits 7..6 – Res: Reserved bits
These bits are reserved bits in the AT90USB64/128 and will always read as zero.
• Bits 5, 4 – EEPM1 and EEPM0: EEPROM Programming Mode bits
The EEPROM Programming Mode bit setting defines which programming action that will be trig-
gered when writing EEPE. It is possible to program data in one atomic operation (erase the old
value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 6-2 on page 26.
While EEPE is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be
reset to 0b00 unless the EEPROM is busy programming.
Bit 1514131211 10 9 8
––––EEAR11EEAR10EEAR9EEAR8EEARH
EEAR7 EEAR6 EEAR5 EEAR4 EEAR3 EEAR2 EEAR1 EEAR0 EEARL
76543 2 10
Read/writeRRRRR/WR/WR/WR/W
R/W R/W R/W R/W R/W R/W R/W R/W
Initial value0000X X XX
XXXXX X XX
Bit 76543210
MSB LSB EEDR
Read/write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value00000000
Bit 765432 10
– – EEPM1 EEPM0 EERIE EEMPE EEPE EERE EECR
Read/write R R R/W R/W R/W R/W R/W R/W
Initial value 0 0 X X 0 0 X 0